Keywords: DC link voltage, diode clamped inverters, neutral point potential regulators, sinusoidal pulse width modulation, SPWM, three-level inverters, offset voltage
A simple carrier-based neutral point potential regulator for three-level diode clamped inverter
Three-level diode clamped inverter is a proven technology nowadays in medium and high power applications. Despite of its several advantages such as harmonic reduction and achieving high voltage and high power capabilities without series and parallel connections of switching devices, neutral point potential (NPP) variation is the inherent problem with this topology. This paper presents a simple NPP regulator based on addition of offset voltage to the reference sinusoidal voltages. This not only regulates the NPP, but also reduces the output voltage and current harmonics of the inverter. Simultaneously, second harmonic get reduced which may otherwise produce torque pulsations, harmonic currents and power losses. Simulation and experimental results have been presented to validate the concept.