Inderscience Publishers

Microstructural investigation of through–silicon via fabrication by pulse–reverse electroplating for high density nanoelectronics

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In this paper, fabrication of through–silicon vias (TSV) with different diameters ranging from 60 μm to 150 μm is reported. It was observed that at the low current density of 20 mA/cm², all the through–holes with different diameters are filled with copper without voids and pores. At higher current density of 40 mA/cm², however, the pillars with diameters bigger than 100 μm tend to have voids at the middle portion of pillars. Focused ion beam (FIB) examination of the copper pillars fabricated with low current density reveals the difference in grain size and internal structure of the grain along the length of the pillar. Current–potential characters of solution were studied for the electrolyte bath used in the process. It shows the limiting current density around 40-60 mA/cm². The microstructures of TSV fabricated at low and high current densities are investigated and it shows that high current density produces porous copper with void at the core of TSV.

Keywords: TSV, through–silicon vias, microstructure, high density nanoelectronics, copper pillars, pulse reverse electroplating, DRIE, nanotechnology, porous copper

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