Keywords: stress relaxation, viscoelasticity, IC delamination, PCB disassembly, stress free temperature, thermal stress, energy release rate, heating rate, peak temperature, waste PCBs, IC reuse, integrated circuits, printed circuit boards, simulation, plastic delamination
Simulation research on the influence of stress relaxation on plastic IC delamination during scrapped PCB disassembly
Functional reuse of Integrated Circuits (IC) is effective to recover electronic utilities. Interfacial delamination may occur when the ICs are disassembled from scrapped Printed Circuit Board (PCB) and reduce reusability. In delamination analysis, viscoelasticity of moulding compound is a non-ignorable property as it reduces the stress. It is the purpose of this research to analyse the effect of stress relaxation before and during the disassembly. Results demonstrate the Stress Free Temperature (SFT) of the plastic IC package is raised several centi-degrees by a reflow process and hardly changed by long-time relaxation at room temperature. Stress relaxation with different heating rates in the disassembly causes a tiny difference of Energy Release Rate (ERR). Based on the results, it is recommended that high heating rate is used when it is below SFT and otherwise moderate heating rate is used. Furthermore, low peak temperature is the most important to avoid delamination.