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LoRa Core - Model SX1303 -Digital Baseband Chip for LoRaWAN Network Gateways with Fine Timestamp Capability
The SX1303 is a new generation of LoRa® baseband processor for gateways. It is size and pin compatible with SX1302 and like SX1302, it excels in cutting down current consumption, simplifying thermal design, lowering Bill Of Materials cost, and reducing overall size of gateways. In addition to supporting all the features of SX1302, SX1303 introduces a new Fine Timestamp capability that enables Time Difference of Arrival (TDOA) network-based geolocation.
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Packaging
- QFN68 Package
Order Codes
- SX1303IMLTRT
Reference Designs
All the information regarding the gateway reference design based on SX1303 chip can be found at the following links
LoRa® Corecell Reference Design for fine Timestamp
- Fine Timestamp
- Up to -141dBm sensitivity with SX1250 Tx/Rx front-end
- 125kHz LoRa reception with:
- 8 x 8 channels LoRa packet detectors
- 8 x SF5-SF12 LoRa demodulators
- 8 x SF5-SF10 LoRa demodulators
- Up to 8 packets can be received simultaneously when Fine Timestamp is enabled
- 125/250/500kHz LoRa demodulator
- (G)FSK demodulator
- Direct interface to Semtech transceivers SX1250, SX1255 and SX1257
- Single 32MHz clock
- Smart Metering
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- Internet of Things (IoT)